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Main system consists of:
AHB-Lite BUS - This bus connects the two masters (Cortex-M0 and uDMAC) and ten AHB slaves. Two APB BUSs - These buses connect Seventeen APB peripherals (Watchdog, two dual timers, pwm, two UARTs, simple UART, two I2Cs, two SSPs, random number generator, real time clock, 12bits analog digital converter, clock controller, IO configuration, PAD MUX controller)
Program memory, data memory, registers and I/O ports are organized within the same linear 4-Gbyte address space. The bytes are coded in memory in Little Endian format. The lowest numbered byte in a word is considered the word’s least significant byte and the highest numbered byte the most significant.
Main purposes of the system configuration controller are the following