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W7500

Figure 1 W7500 Chip


The IOP4IoT W7500 chip is the one-chip solution which integrates an ARM Cortex-M0, 128KB Flash and hardwired TCP/IP core for various embedded application platform, especially internet of things. The TCP/IP core is a market-proven hardwired TCP/IP stack with an integrated Ethernet MAC. The Hardwired TCP/IP stack supports the TCP, UDP, IPv4, ICMP, ARP, IGMP and PPPoE which has been used in various applications for more than 15 years. W7500 suits users who need Internet connectivity best.

Features

  • ARM Cortex-M0
    • 48MHz maximum frequency
  • Hardwired TCP/IP Core
    • 8 Sockets
    • SRAM for socket: 32 KB
    • MII (Medium-Independent Interface)
  • Memories
    • Flash: 128 KB
    • Large flexible-size SRAM buffer for various User Application
      • Min 16KB available if full 32KB socket buffer used
      • Max 48KB available if no socket buffer used
    • ROM for boot code: 6 KB
  • Clock, reset and supply management
    • POR (Power-On Reset)
    • Internal Voltage Regulator : 3.3V to 1.5V
    • 8-to-24MHz external crystal oscillator
    • Internal 8MHz RC Oscillator
    • PLL for CPU clock
  • ADC : 12bit, 8ch, 1Mbps
  • DMA
    • 6-channel DMA controller
    • Peripheral supported: UARTs, SPIs
  • GPIO
    • 53 I/Os (16 IO x 3ea, 5 IO x 1ea)
  • Debug mode
    • Serial Wire Debug (SWD)
  • Timer/PWM
    • 1 Watchdog (32-bit down-counter)
    • 4 Timers (32-bit or 16-bit down-counter)
    • 8 PWMs (32-bit counter/timers with programmable 6-bit prescaler)
  • Communication Interfaces
    • 3 UART (2 UARTs with FIFO and Flow Control, 1 simple UART)
    • 2 SPI
    • 2 I2C (Master/Slave, Fast-mode (400 kbps))
  • Crypto
    • 1 RNG (Random Number Generator): 32-bit random number
  • Package
    • 64 TQFP (7x7 mm)

Details

2015/01/19 11:31 · kevinlee

#Documents


Data Sheet

Files


Reference Manual

Files


Document History

Files


Errata Sheet

Files

Data Sheet History

Version Date Description
1.0.0 2016-07-11 Initial Release(erratum 1) - I2C
1.0.1 2016-12-08 Correct SCL speed in ENG ver

Application Note

How to install KEIL

How to make KEIL new project for W7500

How to use MDK for W7500 Peripherals Examples

How to use GCC for W7500 Peripherals Examples

2015/04/20 14:08 · hjjeon0608


Library and Peripheral Example

Overview

The W7500 provides the CMSIS, driver and Peripheral Example. The W7500 Standard Peripherals library provides a rich set of examples covering the main features of each peripheral. All the examples are independent from the WIZwiki-W7500 platform. Only source files are provided for each example and user can tailor the provided project template to run the selected example with his preferred tool chain.

  • Directory Structure

Fig.directory_structure

  • ioLibrary
    • Application
      • loopback
    • Ethernet
    • Internet
      • DHCP
      • DNS
      • httpServer
    • MDIO
  • Libraries
    • CMSIS :CMSIS Library
    • W7500x_stdPeriph_Driver
      • Each peripheral has a source code file W7500x_XXX.c and a header file W7500x_XXX.h. The W7500x_XXX.c file contains all the firmware functions required to use the XXX peripheral.
      • A single memory mapping file, W7500x.h, is supplied for all peripherals. It contains all the register declarations and bit definition. This is the only file that needs to be included in the user application to interface with the library.
  • Projects
    • peripheral_Examples
      • The W7500 standard Peripherals library provides a rich set of examples covering the main features of each peripheral.
  • Utilities
    • w7500_flash_algo_mdk
      • The W7500 standard library provides W7500 128KB flash algorithm project to debug WIZwiki-W7500 with using ULINK debugger and CMSIS-DAP debugger.

Download

Library GitHub Repository

Release Version

Peripheral description and examples

2015/04/20 08:45 · hjjeon0608

products/w7500/allpage.txt · Last modified: 2015/04/21 14:32 by hjjeon0608